1. Technical Field
The present disclosure relates to a column decoder for non-volatile memory devices, in particular of the phase-change type, to which the following treatment will make particular reference, without this implying any loss of generality.
2. Description of the Related Art
Non-volatile phase-change memories (PCMs) are known, wherein the characteristics of materials that have the property of switching between phases having different electrical characteristics are exploited for storing information. For example, these materials can switch between a disorderly amorphous phase and an orderly crystalline or polycrystalline phase, and the two phases are associated with resistivities of considerably different values, and consequently with a different value of a stored datum. For example, the elements of Group VI of the periodic table, such as tellurium (Te), selenium (Se), or antimonium (Sb), referred to as chalcogenides or chalcogenic materials, can be advantageously used for manufacturing phase-change memory cells. The phase changes are obtained by increasing locally the temperature of the cells of chalcogenic material, through resistive electrodes (generally known as heaters) set in contact with respective regions of chalcogenic material. Selection devices (for example, MOSFETs), are connected to the heaters, and enable passage of a programming electrical current through a respective heater; this electrical current, by the Joule effect, generates the temperatures necessary for the phase change. During reading, the state of the chalcogenic material is detected by applying a voltage that is sufficiently low as not to cause a marked heating, and then by reading the value of the current that flows in the cell. Since the current is proportional to the conductivity of the chalcogenic material, it is possible to determine in which state the material is, and hence determine the data stored in the memory cells.
In a known manner, non-volatile memories include an array of memory cells organized in rows (wordlines) and columns (bitlines). Each memory cell is formed, in the case of PCMs, by a phase-change memory element and by a selector transistor, connected in series. A column decoder and a row decoder, on the basis of logic address signals received at input and more or less complex decoding schemes, enable selection of the memory cells, and in particular of the corresponding wordlines and bitlines each time addressed.
The column decoder comprises a plurality of analog selection switches (made by transistors), which receive on their respective control terminals the address signals. The selection switches are organized according to a tree structure in hierarchical levels, and their number in each hierarchical level is linked to the organization and to the size of the memory array. The selection switches, when enabled, allow the selected bitline to be brought to a definite value of voltage and/or current, according to the operations that it is desired to implement. In particular, a current path is created between a programming stage or a reading stage and the bitline selected. The current path is defined by the series of a certain number of selection switches, and is the same (within the memory array) both for the programming stage and for the reading stage. In particular, upstream of the current path, a selector is generally provided for associating the path alternatively with the programming stage or with the reading stage. Generally, the bitline-biasing voltages for reading operations are generated inside sense amplifiers used for reading the data in the reading stage, whilst the bitline-biasing voltages for writing operations are generated inside purposely provided programming drivers in the programming stage. In a known manner, the sense amplifiers carry out reading of the data stored in the memory cells, comparing the current that flows in the memory cell selected (or an electrical quantity correlated thereto) with a reference current that flows in a reference cell having known contents.
In the specific case of PCMs, in order to carry out reading, voltages of a very low value (for example, between 300 mV and 600 mV) and currents of a standard value (for example, in the region of 10-20 μA) are used, whilst for carrying out writing, voltages of a markedly higher value (for example, approximately 2 V higher than the voltage used for the reading operations) and high currents (for example, in the region of 600 μA) are used; also used, during reading, is a fast settling in the column coding.
In a known manner, in flash memories of a NOR type, the selection switches are usually implemented with high-voltage (HV) NMOS transistors, capable of withstanding both the reading voltages and the programming voltages (see, for example: “A 1.8V 64 Mb 100 MHz Flexible Read While Write Flash Memory”, ISSCC 2001, Session 2—Non-Volatile Memories). This choice enables a greater circuit simplicity (no substrate to be biased) and a saving in the area occupation. In PCMs the use of CMOS switches has also been proposed (see, for example: “A 0.1 μm 1.8V 256 Mb Phase-Change Random Access Memory (PRAM) With 66 MHz Synchronous Burst-Read Operation”, Sangbeon Kang et al., IEEE JSSC, Vol. 42, No. 1, January 2007).
Both of the solutions have disadvantages: a decoding implemented completely with NMOS switches uses high voltages for driving the switches during the programming phase, on account of the body effect on the switches, whilst the approach with CMOS switches entails a greater area occupation.
In addition, in the column decoder described previously the effective voltage on the bitlines is affected by a series of factors that are not foreseeable: process variations in the manufacturing of the selection switches connected in series along the read/write path, and the consequent variation in the voltage drops on these selection switches; temperature variations; the current used by the memory cell; and variations of the read/write biasing voltage. Consequently, fluctuations can arise on the bitline voltage, and may possibly cause errors in the read/write operations.